Sameh ElAshry
Mentor
(39 reviews)
US$15.00
For every 15 mins
105
Sessions/Jobs
ABOUT ME
Verification Verilog && VHDL && UVM & SystemVerilog Expert
Verification Verilog && VHDL && UVM & SystemVerilog Expert
Sameh El-Ashry is working as senior digital verification engineer with 6+ years of industry experience. His work involves the verification of digital wireless communication IPs including PHYs, basebands, MACs, and verification of SerDes IPs. He has different published papers at international conferences for memory controllers, NoC, coverage, assertions, and UVM.
My favorite hoppy is teaching to students.
English
Dublin (+01:00)
Joined July 2020
EXPERTISE
8 years experience | 1 endorsement
8 years experience | 1 endorsement
8 years experience | 7 endorsements
8 years experience | 21 endorsements
8 years experience | 11 endorsements
4 years experience | 1 endorsement
3 years experience
REVIEWS FROM CLIENTS
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EMPLOYMENTS
Senior Digital Verification Engineer
Si-Vision
2015-10-01-2020-10-01
Verification of digital wireless communication IPs including PHYs, basebands, MACs, and verification of SerDes IPs.
Verification of digital wireless communication IPs including PHYs, basebands, MACs, and verification of SerDes IPs.
Python
Makefile
SystemVerilog
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Python
Makefile
SystemVerilog
UVM
Coverage
Cdc
UPF
Uvm ral
Gls
Dft
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Verification Engineer
Mentor a Siemens business
2014-10-01-2015-10-01
Verification of memory controllers.
Verification of memory controllers.
C++
SystemVerilog
UVM
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C++
SystemVerilog
UVM
Dpi
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